Proactively Invalidating Dead Blocks to Enable Fast Writes in STT-MRAM Caches

نویسندگان

چکیده

Spin-Transfer Torque Magnetic Random Access Memory (STT-MRAM) is a promising emerging memory technology for on-chip caches. It has low read access time and leakage power. Unfortunately, however, STT-MRAM suffers from its long write latency high energy consumption. This paper proposes cache management technique called Proactive Invalidation (PROI) that proactively invalidates dead blocks in advance to enable fast writes the Experimental evaluation shows proposed improves performance by 14% on average compared baseline cache. also two optimization techniques Invalidation-aware Data Encoding (PIDE) Narrowness-aware Partial Write (NPW) minimize overheads of Invalidation. results demonstrate total consumption with PROI only 1.8% higher than when applied PIDE NPW.

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ژورنال

عنوان ژورنال: IEEE Access

سال: 2022

ISSN: ['2169-3536']

DOI: https://doi.org/10.1109/access.2022.3158493